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dc.contributor.authorLietaer, Nicolas
dc.contributor.authorSummanwar, Anand
dc.contributor.authorBakke, Thor
dc.contributor.authorTaklo, Maaike Margrete Visser
dc.contributor.authorDalsjø, Per G.
dc.date.accessioned2017-02-13T09:43:34Z
dc.date.available2017-02-13T09:43:34Z
dc.date.created2012-02-22T15:07:58Z
dc.date.issued2011
dc.identifier.citation2010 IEEE International 3D Systems Integration Conference (3DIC), Munich, Germany, 16-18 Nov. 2010nb_NO
dc.identifier.isbn978-1-4577-0526-7
dc.identifier.urihttp://hdl.handle.net/11250/2430387
dc.description.abstractFragile micromachined MEMS structures are usually protected by bonding a capping wafer to the device wafer itself. As opposed to using lateral interconnects at the interface between the cap wafer and the device wafer, the use of vertical through silicon vias (TSVs) significantly simplifies the mounting of the components and it also results in the smallest footprint. This paper presents the concept chosen for fabricating a miniaturized MEMS acceleration switch with TSVs through the SOI (silicon on insulator) device wafer, as well as the experimental results of the TSV process development that was done for this particular application. Especially challenging was the development of an etching process that can etch the thick buried oxide of the SOI wafer through high aspect ratio trenches.
dc.language.isoengnb_NO
dc.relation.ispartof2010 IEEE International 3D Systems Integration Conference (3DIC), Munich, Germany, 16-18 Nov. 2010
dc.titleTSV development for miniaturized MEMS acceleration switchnb_NO
dc.typeChapternb_NO
dc.source.pagenumber274-277nb_NO
dc.identifier.cristin911215
cristin.unitcode7401,90,31,0
cristin.unitnameMikrosystemer og nanoteknologi
cristin.ispublishedtrue
cristin.fulltextpostprint
cristin.qualitycode1


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