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dc.contributor.authorSanchez Acevedo, Santiago
dc.contributor.authorBaltensperger, Daniel Simon
dc.contributor.authorD'Arco, Salvatore
dc.date.accessioned2024-01-22T10:20:21Z
dc.date.available2024-01-22T10:20:21Z
dc.date.created2023-08-10T12:24:49Z
dc.date.issued2023
dc.identifier.citation2023 IEEE Belgrade PowerTechen_US
dc.identifier.isbn978-1-6654-8778-8
dc.identifier.urihttps://hdl.handle.net/11250/3113036
dc.description.abstractState estimation is critical for the monitoring and control of power systems. The conventional approach for state estimation is based on quasi static models for the power systems and as such neglects relevant dynamic effects. These dynamic characteristics are accounted in what are referred as dynamic state estimators (DSE). Several implementations for DSEs have been proposed in literature but mostly focusing on the modelling and numerical aspects. In this paper a laboratory assessment of a DSE for estimating the internal variables of a generation plant is presented. The assessment is conducted with a Hardware in the Loop approach in a laboratory configuration that includes a PDC, real phasor measurement units (PMUs) operating with IEC 61850 sampled values and a real time model of the nordic power system. Experimental results show the behaviour and root mean square error of the estimator for a few different hardware implementations. Thus, it is assessed if the utilization of the IEC 61850 standard may have an impact on performance of the dynamic state estimation and it is quantified the effect on the accuracy.en_US
dc.description.abstractAccuracy Analysis of a Dynamic State Estimator with a Hardware in the Loop Approachen_US
dc.language.isoengen_US
dc.publisherIEEEen_US
dc.relation.ispartof2023 IEEE Belgrade PowerTech
dc.rightsNavngivelse 4.0 Internasjonal*
dc.rights.urihttp://creativecommons.org/licenses/by/4.0/deed.no*
dc.titleAccuracy Analysis of a Dynamic State Estimator with a Hardware in the Loop Approachen_US
dc.title.alternativeAccuracy Analysis of a Dynamic State Estimator with a Hardware in the Loop Approachen_US
dc.typeChapteren_US
dc.typePeer revieweden_US
dc.description.versionacceptedVersionen_US
dc.rights.holderThe Authors hold the copyright to the Author Accepted Manuscript. Distributed under the terms of the Creative Commons Attribution License (CC BY 4.0)en_US
dc.identifier.cristin2166119
dc.relation.projectNorges forskningsråd: 280967en_US
cristin.ispublishedtrue
cristin.fulltextpostprint
cristin.qualitycode1


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